"Advancing Semiconductor Design, Assembly, Testing and Packaging in Southeast Asia"
1st Call for Papers
A premier academic-industry convergence on semiconductor innovation
The Research Conclave, organized by the Department of Electronics and Communication Engineering, Assam Don Bosco University, in collaboration with the Center for Reliability Science and Technology (CReST), Chang Gung University, Taiwan, and the Department of Electronics and Communication Engineering, Gauhati University, aims to bring together researchers, industry experts, academicians, policymakers, and students to discuss recent advancements in semiconductor design, assembly, testing, and packaging in Southeast Asia.
It seeks to promote innovation, strengthen academic-industry partnerships, encourage collaborative research, and develop skilled talent to support the rapidly growing semiconductor ecosystem in the region.
Driving breakthroughs in semiconductor technologies
Strengthening academia-industry collaboration
Fostering cross-border research initiatives
Building skilled workforce for the semiconductor ecosystem
Distinguished experts from across the globe
William E. Leonhard Professor & Department Head of Electrical Engineering
The Pennsylvania State University, USA
Professor & Chair
Indian Institute of Science
School of Electronics Engineering; CReST
Chang Gung University, Taiwan
Professor
Universiti Sains Malaysia, Malaysia
Professor
Indian Institute of Technology Guwahati
Professor
Assam Skill University
Vice President
Assam down town University
Marketing Manager
Moxa, Taiwan
Vice President
Infineon Technologies, Taiwan
Associate Provost
Singapore University of Technology and Design
Vice President & GM, Empyrean Korea
Empyrean Technology
Counsellor & Director, Science and Technology Division
Taipei Economic and Cultural Center in India
Head, Regional Strategy & Ecosystem Development
Tata Electronics
Professor
Assam Engineering College
Professor
North Eastern Regional Institute of Science and Technology
Director & Centre Head
CDAC Centre in Northeast
Key topics, submission guidelines, and event highlights
• Researchers, academicians, and industry professionals are invited to submit papers.
• Topics aligned with semiconductor design, packaging, testing, and emerging technologies.
• Interdisciplinary and industry-focused papers are highly encouraged.
• Selected papers will be presented during technical sessions.
Format: 8–10 pages (PDF)
Industry leaders and renowned experts sharing their insights, experiences, and vision for the future of semiconductor technologies.
Paper presentations by researchers and scholars, encouraging knowledge exchange and academic discussions.
Interactive sessions with academicians, industry professionals, and policymakers addressing current challenges and opportunities.
Opportunities to connect with peers, researchers, and industry experts to build collaborations and professional networks.
| Milestone | Date |
|---|---|
| Paper Submission Deadline | 31 July 2026 |
| Notification of Acceptance | 15 August 2026 |
| Presentation Dates | 25–27 September 2026 |
Programme Schedule & Technical Paper Presentation Sessions (ASDAT-2026)
Welcome desk and registration kit distribution for conclave participants.
Chief Guest: Narayan Konwar, IAS, Commissioner and Secretary to the Govt. of Assam, Department of Higher Education
Speaker: Prof. Cher Ming Tan, CReST, Chang Gung University, Taiwan
Moderator: Prof. Cher Ming Tan, Chung Gung University, Taiwan
Presenter: Corel Technology
Moderator: Prof. Kuan Yew Cheong, Universiti Sains Malaysia
Speaker: Prof. Madhavan Swaminathan, The Pennsylvania State University, USA
Speaker: Prof. Kuan Yew Cheong, Universiti Sains Malaysia, Malaysia
Presenter: Tirame Technology
Moderator: Prof. Sunandan Baruah, Assam Skill University
Speaker: Mr. Chee-How Tan, Vice President, Infineon, Taiwan
Moderator: Dr. Sanchali Mitra, Singapore University of Technology and Design
Conclave summary, best paper awards announcement, and formal vote of thanks.
| Paper ID | Paper Title | Presenter Name |
|---|---|---|
| ID 3 | A BiLSTM Neural Network Technique for Early Prediction of Parkinson's Disease | Ashwini Sharma |
| ID 11 | Deep Learning-Based Energy Optimization for Wireless Sensor Networks | Bhavna Kaurav |
| ID 12 | Developing an Advanced Machine Learning Model for Image Processing Technique | Priya Singh |
| ID 13 | Advanced Deep Learning Model for Diabetic Retinopathy Detection and Classification | Shikha Methil |
| ID 26 | Quantitative Analysis of Conjugate Heat Transference and Nanofluid Flow in Microchannel Heat Sinks for Advanced Semiconductor Thermal Packaging | Jintu Mani Nath |
| Paper ID | Paper Title | Presenter Name |
|---|---|---|
| ID 19 | Identifying Offensive Language: A Machine Learning Approach | Dharitri Sarkar |
| ID 2 | Exploring Machine Learning Applications in the Tea Industry : A Comprehensive Review | Gitanjali Devi |
| ID 21 | Nanotechnology-Enabled Computing Paradigms: Recent Advances in Hardware, Memory and Connectivity | Di Sai Bharadwaj |
| ID 37 | A Comprehensive Review of Recent Advances in Dual-Band Terahertz Patch Antennas for Next-Generation Wireless and Sensing Applications | Maidul Islam |
| Paper ID | Paper Title | Presenter Name |
|---|---|---|
| ID 4 | Comparison of Breakdown Voltage Simulation in 2D and 3D for Vertical SiC MOSFETs | Biranchi Narayan Behera |
| ID 9 | Low-Power Design of a 16-Bit Kogge-Stone Adder with Precomputation and Block-Level Activity Gating for Edge-AI SoCs | Sai Saketh Tejomurthula |
| ID 10 | Design and Low-Power Implementation of a Schmitt Trigger-Based Current-Starved Phase Locked Loop for High-Frequency Clock Generation Using SCL CMOS Technology | Vidhya D S |
| ID 18 | Comparative Analysis of Charge Plasma and metallic layer concepts integrated with Electrically Doped TFET | Md. Aslam |
| ID 6 | Design and Simulation of a Fast Binary Hybrid Adder Using 16-bit CLA-RCA Architecture at 45nm CMOS | Palash Sinha and Jenith Reang |
| ID 7 | Universal Master Slave Flip-Flop for Advanced Digital Systems | Soumak Paul |
| Paper ID | Paper Title | Presenter Name |
|---|---|---|
| ID 5 | Design of Embedded Smart Agriculture Sensing System and Statistical Assessment of Standard Deviation and Dew Point Temperature | Koel Datta Purkayastha |
| ID 22 | Post-Layout Evaluation of the ReDFOD Architecture for Temperature-Based Applications | Arnav Banerjee |
| ID 23 | Performance Analysis of 16-Bit Carry Look-Ahead Adder Architectures in 45 nm CMOS | Aabhash Mukherjee |
| ID 33 | Properties of PVA capped ZnSe Nanoparticles synthesized by different techniques | Tina Biswakarma |
| ID 24 | Multi-Variant RTL Synthesis of 16-Bit Carry Look-Ahead Adders Using Cadence Genus | Apoorva Singh |
| Paper ID | Paper Title | Presenter Name |
|---|---|---|
| ID 14 | Deep Learning Enabled Cluster Optimization for Real-Time Wireless Sensor Networks | Keerti Sahu |
| ID 28 | Mathematical Modeling and Numerical Simulation of Nanofluid Underfill Capillary Encapsulation for High-Density 3D Integrated Circuit Assembly | Bamdeb Dey |
| ID 36 | Frequency Regulation in Inverter-Based Resource (IBR)-Integrated Microgrids Using Grid-Forming (GFM) Inverters and Hierarchical Droop Control | Jesif Ahmed |
| ID 34 | Mathematical model to estimate the performance degradation of a PV array under partial shading conditions | Darshana Sharma |
| ID 16 | Detection and Classification of Parkinson’s Disease : A Review | Ashwini Sharma |
| ID 17 | Deep Learning-Based Tomato Plant Leaf Disease Detection | Satyam Soni |
| ID 20 | Conjugate Modified Arithmetic Subtractor – Adder Unit | Soumika Das & Elora Ghosh |
| Paper ID | Paper Title | Presenter Name |
|---|---|---|
| ID 29 | Investigation of the Structural, Optical and Electrical Properties of Ag-ZnS, and Ag-ZnO-ZnS Heterostructures for Gamma-Ray Detection Applications | Biswajit Nath |
| ID 35 | Development of a Non-Enzymatic Electrochemical Sensor for the Detection of Malathion Pesticide Using a Modified Au-CuO-rGO nanocomposite-based Electrode | Narendra Lakra |
| ID 38 | A review on Machine Learning Based Fault Detection and Reliability Assessment of BLDC Motor | Nayan Jyoti Gogoi |
Secure your spot at Research Conclave 2026
| Category | Early Bird | Regular |
|---|---|---|
| Student / Research Scholar | ₹3,000 | ₹3,500 |
| Faculty | ₹5,000 | ₹6,000 |
| Industry Professional | ₹8,000 | ₹10,000 |
| International Delegate | $200 | $250 |
Industry partners and sponsors will be announced soon. Stay tuned for updates!
Join us at Assam Don Bosco University
Azara Campus, Guwahati, Assam – 781017, India
For queries related to registration, papers, or travel assistance
Department of Electronics and Communication Engineering
Assam Don Bosco
University, Azara Campus, Guwahati, Assam, India